forums.ps2dev.org

From looking more closely at the specifications and source I find the following IMBUSCLK = CPUCLK(294912000) / 8 = 36.864MHz SCLK = UNKNOWN SIO_LCR line control register SCS(bit 6:5) clock select (baud rate) 00 -> IMBUSCLK 01 -> IMBUSCLK / baud...

If my math is correct speeds up to 1.152Mbps should be supported (brd = 1, bclk = 0). Maybe the double if brd = 0 is supported (probably not).

Thanks for the clarification.

I have the hardware soldered and ready done, and will wire it into the PS2 shortly. Based on the MAX3322E. Was a good experience in sm soldering.

I have rewritten the toolchain scripts in a more modular manner to allow a single script to support multiple tool versions with a suitable default.. also modified the beta script to build ps2sdk from CVS instead of the older environment.. The updated toolchain-hno.sh and toolchain-beta-hno.sh can be...

Is it known which is wich of the CTS/RTS pads, or where/if these are reflected in the SIO registers?

I am planning on building a cable for debugging/tracing purposes and is planning on utilizing the higher speeds, where CTS/RTS plays a vital (but not critical) role.

The assembly patch by ryani seems to have been forgotten somewhere (no comments, not in current patches from what I can tell)

http://www.mindspring.com/~foo/binutils ... 9ryani.txt
posted in
http://forums.ps2dev.org/viewtopic.php?t=80 (pixels thread)

Interesting in testing the new toolchain, but www.oopo.net does not seem to be responding at the moment..