VFPU opcodes and register

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Actarus
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VFPU opcodes and register

Post by Actarus »

Hi all,

Im working on my emu and Im writing the code about the VFPU. On this http://hitmen.c02.at/files/yapspd/psp_doc/ I found these opcodes

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vone.s rd 	0xd0070000 	110100 000 0000111 0 0000000 0 ddddddd 	SetVectorOne.Single
vone.p rd 	0xd0070080 	110100 000 0000111 0 0000000 1 ddddddd 	SetVectorOne.Pair
vone.t rd 	0xd0078000 	110100 000 0000111 1 0000000 0 ddddddd 	SetVectorOne.Triple
vone.q rd 	0xd0078080 	110100 000 0000111 1 0000000 1 ddddddd 	SetVectorOne.Quad
In ddddddd there is the register, I know that they are 128, how do I find the register? Is the ddddddd the register?

Thanks advance for your answer.
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Raphael
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Post by Raphael »

Yes. You might also want to take a look at binutils/opcodes/mips-opc.c and binutils/opcodes/mips-dis.c.
And for VFPU instruction documentation, in case you didn't already find it, there's the VFPU diggins thread by hlide, MrMrICE and me.
<Don't push the river, it flows.>
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http://wiki.fx-world.org - VFPU documentation wiki

Alexander Berl
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Post by Actarus »

Thanks for help, but where? SVN? It doenst work.
But for VFPU opcodes that uses the matrices is it the first value?
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Post by Raphael »

Binutils itself isn't on the SVN, just the patch. It gets downloaded when you install the toolchain and is then within psptoolchain/build/binutils-2.16.1.
If you don't have the toolchain installation folder any more, you have to download binutils seperately and extract it and apply the patch.
Therefore, just download the toolchain script and do the following:

Code: Select all

cd psptoolchain
mkdir build && cd build
wget --continue ftp&#58;//ftp.gnu.org/pub/gnu/binutils/binutils-2.16.1.tar.bz2
rm -Rf binutils-2.16.1 && tar xfvj binutils-2.16.1.tar.bz2
cd binutils-2.16.1 && cat ../../patches/binutils-2.16.1-PSP.patch | patch -p1
Else you have just read through the patchfile itself:
http://psp.jim.sh/svn/filedetails.php?r ... -PSP.patch
<Don't push the river, it flows.>
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http://wiki.fx-world.org - VFPU documentation wiki

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Post by Actarus »

ok thanks again, I have another question with this ASM instruction

Code: Select all

vadd.p R100, R000, R020
it puts the sum in the matrix 1 from matrix 0 but which are registers used?

100 = 000+020
110 = 010+030

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|000|001|002|003|        |100|101|102|103|
|010|011|012|013|        |110|111|112|113|
|020|021|022|023|        |120|121|122|123|
|030|031|032|033|        |130|131|132|133|
Can you explain me, please?

Thanks again.
hlide
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Post by hlide »

if i remember well :

Code: Select all

$ 0.. 31 - |S000|S010|S020|S030|S100|S110|S120|S130|...
$32.. 63 - |S001|S011|S021|S031|S101|S111|S121|S131|...
$64.. 95 - |S002|S012|S022|S032|S102|S112|S122|S132|...
$96..127 - |S003|S013|S023|S033|S103|S113|S123|S133|...
and R000 = [S000, S010]
and R020 = [S020, S030]
and R100 = [S100, S110]

so :
$4 = $0 + $2
$5 = $1 + $3

honestly you can deduce it by carefully reading mips-opc.c or mips-dis.c.

And note that they are vectors not matrixes.
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Post by Actarus »

I tried qith this examples but it shows only zero, why? Can you help me?

Code: Select all

float f,*pf,a,b,mtx&#91;132&#93;;
	unsigned int i,i1;
	
	pspDebugScreenSetBackColor&#40;0&#41;;
	pspDebugScreenSetTextColor&#40;0xFFFFFFFF&#41;;
	pspDebugScreenInit&#40;&#41;;
	
	i = &#40;int&#41;mtx;
	if&#40;&#40;i & 15&#41; != 0&#41;
		i = &#40;&#40;&#40;i >> 4&#41; + 1&#41; << 4&#41;;
	printf&#40;"%08X\n",i&#41;;
	pf = &#40;float *&#41;i;
	a = .5;
	b = .2;
	__asm volatile &#40;
        "mtv  %1, S000\n"
        "mtv  %2, S001\n"		
        "mtv  %1, S002\n"
        "mtv  %2, S003\n"		
        "mtv  %1, S010\n"
        "mtv  %2, S011\n"		
        "mtv  %1, S012\n"
        "mtv  %2, S013\n"		
        "mtv  %1, S020\n"
        "mtv  %2, S021\n"		
        "mtv  %1, S022\n"
        "mtv  %2, S023\n"		
        "mtv  %1, S030\n"
        "mtv  %2, S031\n"		
        "mtv  %1, S032\n"
        "mtv  %2, S033\n"		

		"sv.q C000,%0\n"
        "sv.q C010,16+%0\n"
        "sv.q C020,32+%0\n"
        "sv.q C030,48+%0\n"
		&#58; "=m"&#40;*pf&#41; &#58; "r"&#40;a&#41;, "r"&#40;b&#41;&#41;;
	for&#40;i=0;i<4;i++&#41;&#123;
		for&#40;i1 = 0;i1<4;i1++&#41;
			printf&#40;"%f ",pf&#91;i*4+i1&#93;&#41;;
		printf&#40;"\n"&#41;;
	&#125;
Thanks all for help.
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Post by hlide »

I'm at work : no psp.

So the following code is untested :

Code: Select all

static float mtx&#91;4*4*8&#93;;

unsigned int i,j; 
    
pspDebugScreenSetBackColor&#40;0&#41;; 
pspDebugScreenSetTextColor&#40;0xFFFFFFFF&#41;; 
pspDebugScreenInit&#40;&#41;; 

__asm__ __volatile__ &#40; 
	"mtv  %1, S000\n" 
	"mtv  %2, S001\n"       
	"mtv  %3, S002\n" 
	"mtv  %4, S003\n"       
	"mtv  %1, S010\n" 
	"mtv  %2, S011\n"       
	"mtv  %3, S012\n" 
	"mtv  %4, S013\n"       
	"mtv  %1, S020\n" 
	"mtv  %2, S021\n"       
	"mtv  %3, S022\n" 
	"mtv  %4, S023\n"       
	"mtv  %1, S030\n" 
	"mtv  %2, S031\n"       
	"mtv  %3, S032\n" 
	"mtv  %4, S033\n"       

	"usv.q C000,  0+%0\n" // I hope psp-as recognizes this pseudo-instruction &#40;it generates a svl.q/svr.q pair&#41;
	"usv.q C010, 16+%0\n" 
	"usv.q C020, 32+%0\n" 
	"usv.q C030, 48+%0\n"
	 
	"usv.q R000, 64+%0\n" 
	"usv.q R001, 80+%0\n" 
	"usv.q R002, 96+%0\n" 
	"usv.q R003,112+%0\n" 
	&#58; "=m"&#40;mtx&#41; &#58; "r"&#40;1.0&#41;, "r"&#40;2.0&#41;, "r"&#40;-1.0&#41;, "r"&#40;-2.0&#41;&#41;; 
   
	for&#40;i = 0; i < 4; i++&#41;
	&#123; 
		for&#40;j = 0; j<4; j++&#41; 
		&#123;
			printf&#40;"%.1f\t",mtx&#91;i*4+j&#93;&#41;;
		&#125; 
		printf&#40;"\n"&#41;; 
	&#125; 
Last edited by hlide on Wed Sep 10, 2008 12:12 am, edited 1 time in total.
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Post by hlide »

...
Pirata Nervo
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Post by Pirata Nervo »

o.O
why did you post "..." ?
lool
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Post by Actarus »

it doesnt work, with aligned and unligned memory.
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Post by hlide »

please elaborate :

- what do you want to do exactly ?
- what doesn't work precisely ?
- what do you get instead ?

EDIT: or give us the assembly output of this code (use prxtool or psp-objdump on .elf file)
Last edited by hlide on Wed Sep 10, 2008 1:28 am, edited 1 time in total.
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Post by hlide »

Pirata Nervo wrote:o.O
why did you post "..." ?
lool
"Double Post Removed" ^=^
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Post by Actarus »

I dont know but if i write this it doesnt work,

Code: Select all

float mtx&#91;2000&#93;,*pf;

pf = mtx;
__asm volatile&#40;
        "usv.q C000,%0\n"
        "usv.q C010,16+%0\n"
        "usv.q C020,32+%0\n"
        "usv.q C030,48+%0\n"
	&#58; "=m"&#40;pf&#41; &#58; "r"&#40;a&#41;, "r"&#40;b&#41;&#41;;
if i write this it works

Code: Select all

__asm volatile&#40;
        "usv.q C000,%0\n"
        "usv.q C010,16+%0\n"
        "usv.q C020,32+%0\n"
        "usv.q C030,48+%0\n"
	&#58; "=m"&#40;mtx&#41; &#58; "r"&#40;a&#41;, "r"&#40;b&#41;&#41;;
I dont know if it's a simple problem with gas/gcc syntax. I hope it'isnt another chism's bug :D
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Post by hlide »

okay, there is no bug. It is just you don't know how asm constraints work :

- "m" : memory reference (and not pointer !), so you must use "=m"(mtx) or "=m"(*pf) in asm volatile ("usv.q %1, 0 + %0" : ...);

- "r" : register (which can be a pointer !), so you must use "=r"(&mtx) or "=r"(pf) in asm volatile ("usv.q %1, 0(%0)" : ...);

be sure pf really points on &mtx. I use "usv.q" instead of "sv.q" to discard the 16-byte alignment requirement.
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Post by Actarus »

may be but form main.s (the asm file from gcc)

Code: Select all

 #APP
mtv  $3, S000
mtv  $4, S001
mtv  $3, S002
mtv  $4, S003
mtv  $3, S010
mtv  $4, S011
mtv  $3, S012
mtv  $4, S013
mtv  $3, S020
mtv  $4, S021
mtv  $3, S022
mtv  $4, S023
mtv  $3, S030
mtv  $4, S031
mtv  $3, S032
mtv  $4, S033
usv.q C000,0&#40;$2&#41;
usv.q C010,16+0&#40;$2&#41;
usv.q C020,32+0&#40;$2&#41;
usv.q C030,48+0&#40;$2&#41;

 #NO_APP
: "=m"(*pf) : "r"(a), "r"(b));

and this

Code: Select all

 #APP
	mtv  $2, S000
mtv  $3, S001
mtv  $2, S002
mtv  $3, S003
mtv  $2, S010
mtv  $3, S011
mtv  $2, S012
mtv  $3, S013
mtv  $2, S020
mtv  $3, S021
mtv  $2, S022
mtv  $3, S023
mtv  $2, S030
mtv  $3, S031
mtv  $2, S032
mtv  $3, S033
usv.q C000,24&#40;$fp&#41;
usv.q C010,16+24&#40;$fp&#41;
usv.q C020,32+24&#40;$fp&#41;
: "=m"(mtx) : "r"(a), "r"(b));

however you dont worry it's a simple test for VFPU registers.
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Post by hlide »

now it should work, right ?
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Post by Actarus »

yes now it works with aligned and unaligned memory. OMG now it works also with O2.
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Post by Actarus »

Again :) where can I find all VFPU opcodes? And their funcs?
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Post by Raphael »

Raphael wrote: And for VFPU instruction documentation, in case you didn't already find it, there's the VFPU diggins thread by hlide, MrMrICE and me.
<Don't push the river, it flows.>
http://wordpress.fx-world.org - my devblog
http://wiki.fx-world.org - VFPU documentation wiki

Alexander Berl
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Post by Actarus »

thanks I found it but your site is very confused ;)

http://wiki.fx-world.org/doku.php?id=general:cycles and http://forums.ps2dev.org/viewtopic.php?t=6929. The search button doesnt work :( google is better.
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Post by Actarus »

I have another question but for vcmp f1,rs which are the conditions?

Code: Select all

VFPU_EZ,	VFPU_EN,	VFPU_EI,	VFPU_ES,	VFPU_NZ,	VFPU_NN,	VFPU_NI,	VFPU_NS
Can you help me, please?
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Post by Raphael »

1st char:
E = Equal
N = Not Equal
2nd char:
Z = Zero
N = NaN
I = Infinity
S = Inf OR NaN
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Post by Actarus »

Thanks again you are very patient :)
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Post by Actarus »

Another question now on vcmp.* and VFPU_CC, I have this code

Code: Select all

      a = 1;
       b = 0;
       __asm volatile &#40;			
		"mtv  %1,S000\n"
		"vcmp.s NZ,S000\n"
		"mfvc %0,$131\n"
		&#58; "=r"&#40;i&#41; &#58; "r"&#40;a&#41;, "r"&#40;b&#41;&#41;;
	printf&#40;"%08X\n",i&#41;;
	
	__asm volatile &#40;			
		"mtv  %2,S000\n"
		"vcmp.s NZ,S000\n"
		"mfvc %0,$131\n"
		&#58; "=r"&#40;i&#41; &#58; "r"&#40;a&#41;, "r"&#40;b&#41;&#41;;
	printf&#40;"\n%08X\n",i&#41;;


	__asm volatile &#40;			
		"mtv  %1,S000\n"
		"vcmp.s EZ,S000\n"
		"mfvc %0,$131\n"
		&#58; "=r"&#40;i&#41; &#58; "r"&#40;a&#41;, "r"&#40;b&#41;&#41;;
	printf&#40;"\n%08X\n",i&#41;;
		
	__asm volatile &#40;			
		"mtv  %2,S000\n"
		"vcmp.s EZ,S000\n"
		"mfvc %0,$131\n"
		&#58; "=r"&#40;i&#41; &#58; "r"&#40;a&#41;, "r"&#40;b&#41;&#41;;
	printf&#40;"\n%08X\n",i&#41;;
but I have this output,


0000003F
0000003F
0000000E
0000000E


I dont understand,why? The VFPU_CC must be


00000011
00000000
0000001E
0000003F


Can you help me please?
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Post by hlide »

hummm, 1 is not a good candidate.

use 0x40000000 (2.0) instead of 1 (denormalized number).

By the way, try to add 7 nop between vcmp.s and mfvc. Maybe one would be enough.

The reason why you got some weird numbers is because normally you cannot use the result in VFPU_CC immediately after a vcmp as it is not interlocked, so instead of reading the new value, you're reading the previous value.

Initially, VFPU_CC is 0x0000003f.

1) vcmp.s NZ 1 => X = 1, OR = 1, AND = 1, so you'd expect VFPU_CC = (VFPU_CC & (~0x31)) | (0x31). But you get 0x3f which was the previous value.

2) vcmp.s NZ 0 => X = 0, OR = 0, AND = 0, so you'd expect VFPU_CC = (VFPU_CC & (~0x31)) | (0x00). But you get the same value (0x3f) as expected in 1) because you're reading the previous value too early.

3) vcmp.s EZ 1 => X = 0, OR = 0, AND = 0, so you'd expect VFPU_CC = (VFPU_CC & (~0x31)) | (0x00). But you get the same value (0x0e) as expected in 2) because you're reading the previous value too early.

4) vcmp.s EZ 0 => X = 1, OR = 1, AND = 1, so you'd expect VFPU_CC = (VFPU_CC & (~0x31)) | (0x31). But you get the same value (0x0e) as expected in 3) because you're reading the previous value too early.
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Post by Actarus »

For vcmp.s EZ,S000 with S000 == 2 it returns 0xE I think it's good, but form same values with vcmp.q NZ,R000 it returns 0x3F, why?

EDIT :

OK solved, i didnt initialize the matrix OMG it happens :)
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